Mike Polehn
360-260-8599
Professional Experience Summary

Senior computer development engineer with over 25 years experience of Hardware, Software, Digital Signal Processor (DSP), Embedded, and Device Driver development, with full development experience of definition, document, design, create, debug, and test. Flexible, self directed, and independent thinker, capable of doing very complex work with little or no supervision.

Experience

6/2013-6/2016: System and IP Network Engineer
Intel, Hillsboro OR

R&D to increase markets for Intel IA Servers with focus on Linux network performance in Servers and for VM (Virtual Machines) used for data center and Telco IP packet communications.

  • VNF (Virtualized Network Function) POC (Proof of Concept) programs, performance testing
  • Spirent Network Test System: Did 100s of R&D 2544 Zero Loss Ethernet IP network tests
  • Created Flow Logging DPDK VNF, tested in host & VM, in 1 IA server, 12 VMs achieved 0 loss 360 MPPS Ethernet I/O and 380 Gbit data rate with 24 GbE, 5 digit data rate accuracy, continuous operation
  • My OVDK Virtual Switch version, using Spirent to help optimization, achieved 0 loss 23.5 MPPS per Ethernet and full 10 GbE bidirectional rates packets > 128 byte for each of 6 Ethernets, and for switching through source and destination 10 GbE to and through 10 VMs using IVSHMEM
  • Shared Memory (IVSHMEM) High Speed Communications, Realtime Host & Realtime VMs
  • C/C++ Code & Optimization, Algorithm Optimization, code performance testing
  • DPDK Telco Dataplane programs using Telco Realtime Optimization Cycles/Methods
  • Realtime, 100% CPU Core, Multi-Core Packet Process DPDK Programs on IA COTS Servers
  • Huge Page Memory, 2 MB & 1 GB Hugepage Memory used in both Host and KVM VMs
  • Use specific NUMA node for Program, Hugepage memory, and 10 GbE I/O for performance
  • Fortville 10 GbE Ethernet I/O extreme code optimization (DPDK i40e), 16% improvement
  • Instructed Intel ONP Group on how to run multiple Realtime DPDK VNFs on host & VMs
  • ONP Network Performance Testing, Plots, Reports, for Niantic & Fortville (see links)
  • Setup OpenStack System, created Custom VMs and installed in OpenStack
  • Open Source, C code & Optimization, Patch creation & submit, OVS, OVDK, DPDK
  • Windows for data center development console: Putty, MTPutty, WinSCP, and VNC Viewer
  • Linux: Many OS types (CentOS, Ubuntu, etc.) data center installs, configs, updates, dev tools, libs, bridging, KVM VM, VNC, Samba, Firewall, NFS, DNS, NTP, QEMU, git, gcc, sys tools, kernel configuration and builds, grub-2 boot config, etc. etc.

2009-2014: Infrared Electrical Optical Engineer
Lightning Fast Data Technology Inc., Vancouver WA

Provide part-time ongoing support to Sensors Unlimited Inc. (UTC) for the military infrared sensor cameras and related support software used for the U2 reconnaissance military platform.

  • For Infrared cameras being deployed, optimized calibration, using my image processing program
  • Improved image process program for FPA data analysis, display of FPA analysis & characteristics

12/2011-6/2013: System and IP Network Engineer
Intel, Hillsboro OR, Consultant from Ensynch Inc.

R&D work to characterize, evaluate strengths & weaknesses, optimize, and create recipe and network performance data for Intel Architecture based Linux KVM COTS servers used as VM servers targeted for cloud and Telco communications reference systems.

  • Created recipe for Affinitization, NUMA node, Hugepage, I/O Device, Optimization, Host and VM OS CPU core management, and control network to run multiple Realtime DPDK programs in host and multiple VMs at full performance, instead of running just a single DPDK program in system.
  • Created methodology & instructed how to run multiple independent Realtime VMs & Tasks
  • Extensive Network Packet 2544 Zero Loss Performance Testing, Spirent Test System
  • Cloud and Telco Communications Reference System Performance and Recipes
  • SDN Floodlight OpenFlow control of OVS networking through IBM OpenFlow Network Switch
  • Linux network performance studies for Linux KVM for VM to Host, VM to 10 GbE Interface (Intel Niantic), and VM to VM interfaces for virtio and vhost interfaces using single and multiple VMs
  • For VM network, large host network loads do not show in “top” for CPU cores with no task
  • Network Performance testing of PCI Pass-Through and SR-IOV NICs used by VMs
  • strongSWAN IPsec VPN with & without IA Cave Creek/Granite Hill Crypto Accelerators
  • Linux, in data center, setup, bash scripts, C/C++ code test development, git, gcc, libs, make
  • Data Center: Worked on Servers, Power, KVM, SPF & CAT5, configured Ethernet Switches

5/2010-5/2011: IP Network Engineer
Intel, Hillsboro OR, Consultant from Ensynch Inc.

R&D performance improvement experiments of the Linux IP network Protocol Stack. Linux IP network Protocol Stack and Intel IXBGE 10 Gigabit Ethernet NIC performance characterization. Created very detailed Linux Network Protocol Stack flow charts with CPU performance clock cost counts, for User through NIC Device Driver and including IRQs, for 3 generations of Intel IA Xeon processors.

  • Added code to the Linux Kernel for each performance measurement, rebuilt kernel, ran test
  • Linux Network Protocol Stack Code Performance Experiment, RX Socket Code Flushes NIC RX
  • Linux Kernel, Kernel Module, and Device Driver modifications, Builds, Testing & Evaluation

4/2008-6/2009: Infrared Electrical Optical Engineer
L3 Communications, Tempe AZ, Consultant from Oxford Global Resources Inc.

L3 Communications bought the Northrop Grumman facility and continued to work on the U2 Infrared Cameras and a new test system for the infrared focal plane sensor chips. FPA (Focal Plain Array) Sensor Device test program:

  • Created Window’s GUI C/C++ program to easily view sensor data as test performed
  • Completed this 80k line multi-window program in less than a year in addition to other work
  • Did Signal Processing, Image Analysis, and Detector Equalization and displayed data on screen
  • Image display area, square samples scaled for nXn pixel size, scrolled in X and Y directions
  • Putting Mouse over pixel showed full statistics for pixel, detector, line frame, & line of frames
  • Saved test data to files for later review, reprocessed earlier test data for more detailed reports
  • Tests used image backgrounds from Liquid Nitrogen, Black Body, and Labsphere
  • Test report saved in RTF, detailed tables, high quality data plots, MS Word converted to Word doc
  • Saved test cost since operations could easily be seen, reducing time when not correctly working

Did quality evaluations using the FPA device test result documents to determine which Infrared FPA devices to put the Infrared Photon Frequency Bandpass Filters on. Device operation quality helped determine the order for FPA device deployment.

Continued FPA Dewar vacuum bake analysis, test evaluation, and doing calibration of all infrared cameras being deployed while developing the infrared FPA device test program.


9/2004-3/2008: Infrared Electrical Optical Engineer
Northrop Grumman, Tempe AZ, Consultant from Oxford Global Resources Inc.

This focused on high performance, cryogenically cooled, airborne “Military Asset” Infrared Camera making ready for deployment in the “U2 Dragon Lady” surveillance aircraft.

The Military Infrared Camera Calibration and Qualification Test

  • Test written in Visual Basic, moved to a newer Visual Basic version, adjusted for incompatibilities
  • Added C DLL code to save test data to files and increased data to about 1000 scan lines per test
  • Improved for algorithms, correct math, edge conditions, readout bias voltages, and err handling
  • Found newer Blackbody was too unstable causing ripples in test data resulting in failed tests
  • Did the requalification of the Military Infrared Camera Calibration and Qualification Test Program

Created Image Processing program to analyze Infrared Camera data

  • C/C++ Window’s GUI, many windows, created 99% of 110k lines, many plot types used in docs
  • Digital Signal Processing, analysis of data in Realtime (50 MB/S), scrolling display, multithreaded
  • Post review of Infrared Camera Test data files, evaluated test failures, help improve camera tests
  • Improved Infrared Camera image quality by using Image Program to analyze Data and do tuning
  • Used in many engineering tests of the Infrared Camera, including failure analysis and tuning
  • Putting Mouse over pixel showed full statistics for pixel, detector, line frame, & line of frames
  • Detailed detector analysis software, reprocessed test data, became part of tuning for deployment

Engineering tests of Infrared Camera

  • Tests used image backgrounds from Liquid Nitrogen, calibrated Black Body and Labsphere
  • Detector and Readout Electronics Bias Voltage optimization tests (5 bias voltages)
  • FPA vacuum bakes analysis, tracking, reports, found Vacuum Bake & Getter heat damage to FPA

Night Vision Power Supply Testing Programs: Improved and corrected test system’s C/C++ code


4/2003-7/2003: Hardware Development Engineer
RedcellX, Portland OR

MP3 Player: Designed HW and created test firmware. ADSP-BF531 Blackfin DSP, SRAM, NOR FLASH, 16MByte SDRAM, SPI EEPROM, 32 MByte NAND FLASH, Smart Media Card (for NAND FLASH firmware development), and SD Card Interface. Serial Audio A/D and D/A with Microphone and FM input, LCD with 5V boost regulator, Li-Ion Battery with charger. Created ORCAD schematics and did hardware test and debug using JTAG ICE.


1/2001-6/2001: Software Engineer
Intel, Hillsboro OR, Consultant from H. L. Yoh

LINUX based PC BIOS Test System: Used C/C++ to create a LINUX based BIOS test platform to test the BIOS Real and Protected Mode functions. LINUX runs in Protected Mode and can call Protected Mode BIOS functions, so the primary work was to create a way to test the Real Mode BIOS functions. The Real Mode test was done by loading a special “Real Mode test program” into the lower 1 MB memory, which had been reserved, exiting LINUX and switching to Real Mode and to execute the Real Mode test program, which ran the test, then used BIOS calls to reboot LINUX to get the test results.

LINUX work: Kernel modifications included reserving lower 1 MB memory, terminating Linux and jumping into Real Mode 16 bit executable code, and memory mapping modifications to allow the BIOS and BIOS Flash PROM to be mapped into memory and accessed by user test programs. User programs included a 16 bit executable program loader, a LILO boot memory usage analyzer, real mode test program execution environment, and test result data collection code. System service libraries written included special LDT (Local Descriptor Table) management code, BIOS and Flash memory mapping, 16 bit protected mode calling interfaces with before and after call register logging features for making BIOS calls, and user mode calling support for BIOS calls for DMI, SMBIOS, BIS, PnP, and CMOS management.

Real Mode Test Programs: Since DOS was not to be loaded, which would wipe the test memory, the 16 bit real mode programs had to be built without DOS present. Modified the ctr0.asm, which is the program execution start code linked into a Real Mode programs, to remove the DOS execution environment. To allow most of the Microsoft 16 bit runtime library functions to be linked to the test program, an environment specific memory manager and a library of simulated DOS system calls was created. Several “Operating System Not Present”, 16 bit Real Mode executable test programs were created for the LINUX test environment to demonstrate the operation.

gcc assembler: gcc didn’t correctly assemble the inline assembly code for switching back into Real Mode. Contacted the gcc maintainers, they made a correction and sent me a patch to fix it.


4/2000-9/2000: Telco Communications Switch Engineer
Oresis Communications, Beaverton OR, Consultant from ATSI Group

Telephone Switch Clock System: Embedded C/C++ firmware for PowerPC uPC controller in central office telephone switch. Compiled, debugged, and tested using VxWorks RTOS, Tornado Debugger, with JTAG ICE for telephone clock selection, synchronization and distribution in telephone switch chassis. Created control tasks and T1 and E1 device drivers, line statistics, did control signal (AIS, LOS, LOF, RAI) integration. CVS source control.


7/1999-2/2000: NetBSD Software Engineer
Intel, Hillsboro OR, Consultant from H. L. Yoh

Embedded NetBSD Device Driver BSP: IA server Infiniband data switch interface bus and slots. Embedded controller C/C++ using NetBSD OS for 32 bit ARM RISC uPC. Control Software & BSP kernel device drivers included, Time Clock, System Timer, Dead-man Reset Timer, I2C, fan, card type detection, card configuration, and interface slot management for hot insert, removal, power management, and status change. CVS source control.


2/1999-5/1999: BIOS Development Engineer
Radisys Corporation, Hillsboro OR, Consultant from Aerotek

New BIOS and BIOS ROM: Created a C code and assembly Phoenix type BIOS EPROM and tested for an industrial computer board.


9/1998-12/1998: IP Network Engineer
Columbia Sportswear, Portland OR, Consultant from H. L. Yoh

Warehouse Management System: Network consultant for the development of a warehouse merchandise warehouse management system. Advised and educated on UNIX TCP/IP Socket communications. Window’s GUI C/C++ application created included TCP/IP data flow monitoring, logging, and runtime data display and was used to assist in integration of product management computer to the real-time factory control computers. Recommend and resulted in TCP/IP protocol changes to systems being integrated to provide a reliable and robust communications protocol. (Note: Worked part time at Columbia Sportswear until Radisys job ended.)


6/1998-11/1998: BIOS Development Engineer
Radisys Corporation, Hillsboro OR, Consultant from Aerotek

Year 2000 Update: Did year 2000 BIOS C code updates for12 BIOS PROMs for 15 embedded x86 based Industrial Computer Boards. Microsoft MASM Assembler and Microsoft C compiler used to change the Award and the Phoenix type BIOS code. PVCS and MKS Source Integrity source code control.


4/1997-5/1998: Modem Development Engineer
Diamond Multimedia, Vancouver WA, Consultant from H. L. Yoh

Embedded Firmware for Modem: Developed embedded C/C++ modem firmware on National CR32 uCPU. Device drivers: UART, Autobauder, driver management, critical Interrupt, and PnP. Created AT command parser, huffman compression/decompression, communications management, and flow control code. Modem compliance: PnP 1.0a, PnP COM, DTE V.24, USART, UART, V.25ter and Annex A, MS Unimodem, #UD and MDK, V.80, V.voice, V.8, V.8bis, FAX EIA/TIA-578 and T.31, Caller ID, V.pcm, V.34, V32bis, V32, V22bis, V22, V21, Bell 212, Bell 103. GNU gcc, cross compilers and tools, for modem firmware. MKS Source Integrity source control. Some HW work: created PAL and used logic analyzer, to debug FPGA before SOC ASIC.


4/1996-3/1997: Computer Development Engineer
Acres Gaming, Corvallis OR, Consultant from H. L. Yoh

Casino Gaming Data Network System: Created embedded C/C++ firmware for x86 Real Mode compatible National SOC using PSOS+ RTOS. BSP Device Drivers: 16550 UART, SMC91C94 Ethernet, 16 bit AD1812 Sound, I82365SL PCMCIA, PD6722 PCMCIA, 22 interrupt 8259 PIC, ISA PnP, 6 Channel DMA, PSOS+ Serial Console Driver, SFF-8020i and Errata C ATAPI CD-ROM, and GPIO. Created Power-up initialization and boot-loader code put in EPROM. Brought up new HW, created test assist HW, used Ethernet Network Analyzer, and used Logic Analyzer, for HW debugging. Created casino TCP/IP Server for communicating card reader data. Used PSOS+ debugger through serial port and then later through Ethernet. Created Sound TCP/IP Sound Server, played MS Wave, files (ISO 9660) from CD-ROM to audio output. Window’s GUI winsock TCP/IP Client, audio control program.

Gaming Card Reader with Display: Created C/C++ embedded code, device driver, communications protocol, and display formatting. Multiple card readers attached to each Data Network System.


4/1993-2/1996: DSP Software Engineer
Intel, Hillsboro OR, Consultant from H. L. Yoh

ProShare Video Conferencing: Embedded C/C++ firmware using SPOX RTOS using TMS320C30 DSP for ISDN interface board. Device Drivers: ISDN 2B+D and Audio (standard PC). Work included MIPs Optimization, Memory Measurement and Memory Optimization, Sound Mixer modifications, H320 Video Optimization, Audio Format converters, Firmware Loader, DSP runtime task load measurement and display. Add in TMS320C30 DSP card: runtime loop, G728 Audio Compression and Decompression, and serial communications and drivers. Some ProShare Window’s GUI application work.

PBX Communications Board: Project Lead for Embedded C/C++ firmware using SPOX RTOS using TMS320C30 DSP for PBX interface board. Telephone B Channel Device Drivers included 8 KHz (A-law & u-law) digital stream, HDLC, V120, V110, and PBX proprietary formats. TAPI (Telephone API) call stack code and call management application. Did HW test & debug, some HW modifications for robust SW and operation. Created digital modem, com stack, and demonstrated. Took to CCL (Communications Certifications Laboratory) and passed all certification tests.


12/1992-4/1993: Modem Development Engineer
Racal Data Communications, Sunrise FL, Consultant from Aerotek

Modem Data Pump Code: Created, tested, profiled and debugged DSP Modem Pump code for DTMF processing. Simulated, developed algorithms, and plotted results using Matlab. Validated the processing sequence using Floating Point and Integer Simulations on a PC using C code program. Resultant C code was ported to TMS320C51 DSP, reviewed the compiled assembly generated by compiler, then created hand optimized assembly code (quicker method then going straight to hand assembly) using the C code as comments.


12/1991-5/1992: Hardware Design Engineer
Advanced Technology Laboratories, Bothell WA, Consultant from CDI Corp West

Ultrasound Data Collection: Project Lead Engineer for hardware design for 32 MHz Pipelined Data Collection Board for Ultrasound Signal Processor. Developed Architecture Design & Doc. Design included ABT, DRAMs, Sync FIFOs, & Surface Mount.


4/1991-10/1991: Hardware Design Engineer
Data I/O, Redmond WA, Consultant from Butler Service Group

Created hardware interfaces and programming for programming memory devices (EPROMs) on customer boards inserted in the Data I/O programming systems.


4/1983-7/1990: Infrared Digital Signal Processing Engineer
Boeing Aerospace, Kent WA

Infrared digital image processing R&D, designed and delivered Infrared Digital Signal Processors.

Infrared Sensor Digital Signal Processing R&D: Infrared Sensor Processing Research and Development included Digital Signal Processing algorithm development, image algorithm development, noise modeling, data modeling, telescope modeling, IR sensor and image convolution models, did extensive simulations, did tradeoff studies, collected sensor data, experimented with sensor data, attended conferences and meetings, and presented data and results at meetings.

  • Participated in writing contract proposals and attending contract meetings
  • Presented performance data, operation theory, simulation results, and contract results
  • Provided support for airborne Infrared telescope by providing algorithms for simulations, HW test support, runtime data collection from sensor signal processor, and evaluation of data

Scanning Infrared Sensor Signal Processor (SIRSSP):

  • Project manager, architect, and primary design engineer for pipelined DSP (Digital Signal Processor)
  • 27 MHz pipeline data rate, 16 bit, 2-D filter with 3.5 billion OP/S, 7 boards with over 1000 ICs
  • HW micro-coded sequencers, wrote sequencer compiler code, control uPC loaded sequencer RAM
  • Embedded 68000 controller, C & Assembly Firmware, interface to VAX server for data and control
  • Did HW Schematic & layout, boards made, bought parts, assembled, debugged with logic analyzer
  • SIRSSP processed Infrared FPA device with strong radiation, collected on VAX, presented results

Infrared Sensor Digital Signal Processor:

  • Designed HW: multiple infrared wavelength correlator, interface to VAX for control & data logging, serial interface (Z80 based) from DSP to Data Processor
  • Wrote 68000 embedded firmware, data report formatter, communications, tested using emulator
  • Created control & data log program for VAX, graphical display of data, & playback of logged data
  • After DSP designed & built, it was unreliable, used logic analyzer, fixed 4 ½ 19 inch rack drawers, 12 wire wrap about 80 ICs/board per drawer, corrected algorithm logic & optimized HW timing
  • Delivered Scanning Infrared Sensor DSP to missile defense center test bed, assembled in 1 hour, ran as expected, spent rest of 2 weeks improving VAX data log and graphical display program
  • This VAX program was used extensively by users of the infrared signal processing test bed

Hardware and Software Development Skills Summary

CPUs and uPCs Used: Xeon (Nehalem to Haswell), ADSP-BF531 BlackFin, MCF5280 ColdFire, MCF5272 ColdFire, MCP859T embedded PowerPC, x86 (88, 386 to i7), National 486 embedded CPU, 32 bit ARM, PowerPC, CR32 RISC, TMS320C30, TMS320C51, 68000, 68010, 68020, Z8000, Z80.

Hardware Device Types: DSPs, uPCs, NOR FLASH, NAND FLASH, SRAM, SDRAM, FIFOs, TTL, CMOS, ECL, GAL, PAL, PLD, FPGA, A/D, D/A, Audio Devices, VLSI Devices, Boost and Buck regulators, and Analog Devices.

HW Development Tools: Mentor schematic tools, Orcad schematic and board layout tools, state machine and programmable logic tools, timing analysis, and SPICE. DSP & uPC Emulators, Logic Analyzers, Oscilloscopes, and HW prototyping tools.

Languages: C, C++, Fortran, Pascal, Visual Basic, Cobol, Assembly, HTML, & BASH Shell Scripts.

Assembly: X86 32 & 16 bit Protected, Real, and mixed. GAS, MASM, TMS320C51, TMS320C30, 68000, various embedded controllers.

Telecom Device Drivers: T1, E1, ISDN, B, D, 2B+D, aLaw, uLaw, HDLC, V120, V110, G728, interface statistics, and PBX D channel call management.

Computer and Embedded Device Drivers: Ethernet, Sound, Serial, Parallel, PCMCIA, PIC, PnP Enabler, DMA, Console, EIDE ATAPI CD-ROM, USB, RTC, Timer, PC BIOS Code, I2C, Fan & Sensor, various special interfaces.

Operating System Side Code: System Services Use, Systems Service Modifications, Device User Interface, Software ISRs, Hardware ISRs, Sound Mixer, Sound File Decoder, CD ROM File System, Operating System Loader, Program Relocatable Loader, System Memory and Page Descriptor Management.

General Applications: Window’s programs, Windows memory use sort, classifier, and analyzer. TCP/IP Servers, Clients, Winsock, UNIX Socket, and TCP/IP specific communications protocol monitor and log. Real world signal data analyzing software. Data simulators and algorithm performance analyzer programs.

Embedded Real Time Operating Systems: VxWorks & Tornado, PSOS+, BSD 4.4 Unix as RTOS, LINUX as RTOS, SPOX, QNX, created primitive RTOS, and embedded and loadable programs with no commercial OS or RTOS present.

General Operating Systems: DOS, Win 3.1, Win 95, NT, ME, 2000, XP, NetBSD (4.4 BSD UNIX derivatives), LINUX, and VAX.

Graphical User Interface (GUI): Windows SDK and GUI, Graphics Libraries, Tektronix Terminal GUI.

Program Development Tools: Windows SDK and Windows DDK, Microsoft Visual Studio Visual C++, C, Microsoft Visual Basic 6.0, Assemblers, various Editors and Debuggers. Includes Microsoft 16 and 32 bit compilers of C, C++, and MSVC 1.0 though 6.0. Borland 16 and 32 bit. Source code management with CVS, MKS Source Integrity, PVCS, Source Safe and Git. Hardware debugging tools included ICE and uPC Emulators, Logic Analyzers, and Oscilloscopes.

Cross Platform: Windows X-Window Servers, Windows Cygwin Bash shell environment and tools, cross compilers.

UNIX, LINUX Development: DPDK host and VM, GCC, GAS, GDB with various user interfaces, VI, CVS, BASH, KORN, Make, Shell Scripts. LINUX 2.4 and 2.2.10, NetBSD 1.5 , BSD 4.4 kernels, Have written user side programs, Device Drivers, loadable OS Modules, and have made Operating System code modifications. Modules and compile time device configuration. UNIX SW development tools, created & submitted open source kernel patches and open source patches.

UNIX, LINUX System Administration: CentOS(preferred), SuSE, Redhat. Kernel configurations and builds. Run Level creations, modifications and management. System HW, Disk, Disk Partition, Organization, Assembly, and OS Installation. SAMBA, Apache, CVS Server, NFS Client and Server Management. System Networking, HW configuration, IP address administration, Internet, Intranet, and Firewall DMZ, Internet Security, IP Chains/Rules. User and Group Management. Note : Primary a development engineer. System, Network, and code administration experience is from development administration needs for various projects.

Office Tools: Word, Excel, PowerPoint, Microsoft Office, Web Browsers, E-Mail, Adobe Acrobat.

Documents

Part of “IEEE 1355” balloting committee: IEEE Standard for Heterogeneous Interconnect (HIC)(Low-Cost, Low Latency Scalable Serial Interconnect for Parallel System Construction) http://ams.cern.ch/AMS/Electronics/Docs/1355-1995.pdf.

Education

Oregon State University, BS Electrical and Computer Engineering, 1983.

Portland State University, Graduate Level classes, 2003